A primary task in amplifier design is determining the best load impedance(s) to present to a device. Load pull is frequently used for this task, and ADS has many load pull simulation setups and data displays. This new example shows how to plot contours of constant EVM from a load pull simulation.
EVM is one method of measuring distortion, and this example enables you to clearly see trade-offs between EVM and output power, and take PAE into consideration also, when choosing the optimal load to present to a device.
This example is explained in a white paper and application note, Running a Load Pull Simulation and Plotting Error Vector Magnitude Contours, by Andy Howard.
You can also download the ADS example from the Agilent EEsof Knowledge Center: http://edocs.soco.agilent.com/display/eesofkcads/Contours+of+EVM+from+a+Load+Pull+Simulation
ADS Reference Material and Webpages (no login required):
- Agilent EEsof EDA main webpage
- ADS webpage
- ADS 2012 QuickStart for New Users
- The ADS 2011 Circuit Design “Cookbook” (complete the form, then download a copy!)
- Agilent EEsof EDA’s RF & Microwave Design Flow webpage
- Agilent EEsof EDA’s Foundry Partners & Component Vendors webpage
- Agilent EEsof EDA’s YouTube videos webpage (for all EEsof solutions)
- ADS 30-Second Video Demos
- Agilent EEsof EDA’s “Innovations in EDA” Library of Webcasts
- Agilent EEsof EDA Knowledge Center (requires a login)
- Device selection and biasing:
- What if you don’t have a nonlinear device model but only have measured load pull data? You can use the Load Pull DesignGuide to plot contours from the measured load pull data and determine optimal impedances to present to the device.
- Import device netlist(s) provided by professor to use for trade-off simulations. The general documentation for importing netlists in ADS can be seen here.
- DC biasing for proper bias.
- Matching, linear, and nonlinear simulations using biased device:
- Matching networks (input, inter-stage, output)
- Additional capabilities to help improve your design:
- Parameter sweeps (already covered in templates from the Amplifier DesignGuide).
- Optimization and tuning, with focus on using the Optimization Cockpit. A 30-second video for the Optimization Cockpit can be seen here.
- As shown in multiple examples, EM simulation on the layout can be included in EM/circuit co-simulations in order to include the physical effects of the layout with any of the circuit simulations.
- Note that there are also a variety of verification templates that can be used to test your PA under modulated stimulus conditions. In addition to other content that can be made available, these are included in various example locations under folders named for the communication standards.
- For reference on even more examples, you can visit the Main ADS 2012 Examples webpage
- /examples/Momentum/emcktcosim/LNAEmCktCosim_wrk = board-level LNA simulation using EM/circuit co-simulation (not PA, but a nice board-level amplifier example with similar flow)
- /examples/RF_Board/NADC_PA_wrk = simulation of a board-level NADC PA
- /examples/RF_Board/PCS_pamp_wrk = simulation of a board-level PCS PA
- /examples/RF_Board/cellular_pamp_wrk = simulation of a board-level cellular PA (includes custom DRC rules and DRC check on the layout)
- /examples/KC_Examples/ClassC_AmpDesR2_wrk = LoadPull simulation on a Class C amplifier
- /examples/MW_Ckts/LargeSigAmp_wrk = Large Signal simulations on an amplifier
- /examples/MW_Ckts/MMIC_Amp_wrk = Comprehensive design flow example on a MMIC amplifier (using a generic PDK for the foundry components)
- /examples/FEM/QFN_Designer_wrk = FEM example for simulating a QFN package.
- /examples/MultiTech_Module/MTM_Flow_MMIC_Chip_QFN_Package_wrk = a nice example that shows how to include the QFN package with the amplifier chip (LNA MMIC in this example, but would use same capabilities for a packaged PA MMIC simulation)
- /examples/RFIC/amplifier_wrk = simulation of a simple RFIC PA
ADS Reference Material and Webpages in the Agilent EEsof EDA Knowledge Center (login required):
A Typical Design Flow in ADS for Power Amplifiers:
ADS 2012 examples specific to PA Design. Please note that you can browse to the example path shown for each below, and you can click on the hyperlink to see an online overview if you have a Knowledge Center login (since the online documentation resides within this web location).
ADS examples on the Agilent EEsof Knowledge Center (login required) related to power amplifier design
There are more than 80 examples or notes related to power amplifier design. Do a search for “Power amplifier”.
This page has examples that show envelope tracking simulation: http://edocs.soco.agilent.com/display/eesofkcads/Applying+Envelope+Tracking+to+Improve+Efficiency
This page has an example that shows how to analyze Doherty power amplifiers: http://edocs.soco.agilent.com/display/eesofkcads/Using+ADS+to+Investigate+the+Performance+of+a+Doherty+Power+Amplifier
This is a fairly basic example of a power amplifier using a high-power device: http://edocs.soco.agilent.com/display/eesofkcads/power+amplifier+design+using+Freescale+device
This has a good collection of references on amplifier design:
App Notes and Webcasts (both upcoming and on-demand) about PA Design using ADS (archives include streaming video and slides to download):
- Simulating Envelope Tracking with Advanced Design System (App Note)
- Doherty PA Performance Investigation using ADS (App Note)
- GaN on SiC: RFMD High Power Doherty Design, Modeling & Measurement Webcast
Live broadcast Mar 7, 2013; 10am Pacific
- Freescale’s Power Amplifier Design Methodology Innovations Webcast
Original broadcast Jan 10, 2013
- RF Power Amplifier Design Series: Part 5: Envelope Tracking Simulation and Analysis
Original broadcast Dec 13, 2012
- RF Power Amplifier Design Series: Part 4 – RF Module Design using Amalfi CMOS PA
Original broadcast Nov 15, 2012
- Integrated Electro-Thermal Solution Delivers Thermally Aware Circuit Simulation
Original broadcast Oct 4, 2012
- Power Amplifier Design with X-Parameter* Power Transistor Models
Original broadcast Sept 6, 2012
- Innovations in EDA: IC, Laminate, Package Multi-Technology PA Module Design Methodology
Original broadcast Aug 2, 2012
- RF Power Amplifier Design Series – Part 3: Fast Characterization of Power Amplifier Performance with Modulated Signals
Original broadcast Apr 5, 2012
- RF Power Amplifier Design Series – Part 2: End-to-End Design and Simulation of Handset PA Modules
Original broadcast Mar 1, 2012
- Using Simulated and Measured Load Pull for Optimal Performance in RF Power Amplifier Design
Original broadcast Nov 3, 2011
- How to Make Your Existing Designs More Robust
Original broadcast July 28, 2011
- Multi-Technology RF Design Using the New Advances in ADS 2011
Original broadcast March 01, 2011
- X-Parameter* Case Study: GaN High Power Amplifier (HPA) Design
Original broadcast January 11, 2011
- Accurate Modeling of Packages and Interconnects
Originally broadcast December 02, 2010
- Applying the Latest Technologies to MMIC Design
Originally broadcast November 11, 2010
- Using ADS LoadPull Simulations for PA Design (2011)
- ADS for MMIC (LTE PA) Design (2010, includes webcast and workshop material)
- RF Amplifier Design using Available Gain and ADS EM/circuit co-simulation (2009)
- Amplifier Design in ADS for RADAR Applications (from 2005 Seminar)
- Power Amplifier Design in ADS (from 2004 workshop)
Some classic references from Past Workshops & Seminars:
ADS applications developer, Andy Howard, has created a new high-power amplifier Envelope Tracking (ET) example that includes a comparison of an X-parameter model and the original transistor-level amplifier with a 64-QAM signal. With the 64-QAM signal it is easy to change the signal bandwidth and see the impact on the amplifier’s performance with Envelope Tracking: 20130208_Envelope_Tracking_Sim_Ex_3.
Also, two existing ADS Envelope Tracking examples have been updated.
In both of these two examples, many of the data displays have also been updated, making it much easier to make direct comparisons between two different ET simulations. And, they have a corrected method of determining the available source power, which enables the design to better maintain constant gain during envelope tracking.
To download the full ADS workspace examples, click here and you’ll be taken to the Agilent EEsof EDA Knowledge Center
Designers of amplifiers for pulsed signals, such as radar systems or defense applications, may need to run load pull simulations using pulsed bias and RF signals. This ADS example shows how to pulse both the bias voltages and the RF input signal as well as plot contours at a particular time point in the RF pulse.
To view the white paper that describes this application visit Simulating Load Pull with Pulsed Bias and RF
To download the full ADS workspace examples visit the Agilent EEsof EDA Knowledge Center
Scintera Networks and Sumitomo Electric, both ADS customers, present results of a linearized and high-power 6GHz GaN power amplifier using RF pre-distortion techniques for microwave P2P applications. Click to register now: http://ow.ly/k1mTL
The 2nd Edition of the ADS Circuit Design Cookbook is available for free. It includes over 300 pages on tutorials, examples and applications of basic and advanced ADS capabilities. The 2nd edition has been updated for ADS 2011 and later release. Order your copy for free by visiting ADS Cookbook 2.0
Simulating Envelope Tracking with Advanced Design System
This application note shows simulation techniques for envelope tracking of an example amplifier.
The Load Pull DesignGuide has been extensively updated for ADS 2011. Impedance load pull simulation setups have been added. It is often optimal to sample lower impedances. These additions make it easier to specify the region of the Smith Chart you want to sample. Also, data display pages have been added that make it easier to make trade-offs between power delivered and PAE, between gain and PAE when delivering a specified output power, or between power delivered and PAE at a specific amount of gain compression. The updated Load Pull DesignGuide may be downloaded from the Agilent EEsof Knowledge Center: http://edocs.soco.agilent.com/display/eesofkcads/Load+Pull+DesignGuide+Enhancements+for+post+ADS+2011_10
This PDF (20121109_Load_Pull_DG_Update_post_ADS_2011_10) describes the improvements and has many screen captures.
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